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H8SX/1657 Datasheet(PDF) 86 Page - Renesas Technology Corp |
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H8SX/1657 Datasheet(HTML) 86 Page - Renesas Technology Corp |
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86 / 892 page ![]() Section 2 CPU Rev. 2.00 Jun. 28, 2007 Page 62 of 864 REJ09B0341-0200 A transition to the reset state occurs whenever the RES signal goes low. A transition can also be made to the reset state when the watchdog timer overflows. Note: * Reset state* Exception-handling state Request for exception handling End of exception handling Program execution state Bus-released state Bus request End of bus request Program stop state SLEEP instruction Interrupt request Bus request End of bus request RES = high RES = low Figure 2.16 State Transitions |
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