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H838532H Datasheet(PDF) 344 Page - Renesas Technology Corp |
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H838532H Datasheet(HTML) 344 Page - Renesas Technology Corp |
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344 / 508 page  Section 10 Serial Communication Interface Rev. 1.00 May 30, 2008 Page 324 of 484 REJ09B0436-0100 Start receive error processing End of receive error processing 4 Clear bits OER, PER, FER to 0 in SSR Yes OER = 1? Yes Yes FER = 1? Break? Yes PER = 1? No No No No Overrun error processing Framing error processing (A) Parity error processing If a receive error has occurred, read bits OER, PER, and FER in SSR to identify the error, and after carrying out the necessary error processing, ensure that bits OER, PER, and FER are all cleared to 0. Reception cannot be resumed if any of these bits is set to 1. In the case of a framing error, a break can be detected by reading the value of the RXD3x pin. 4. Figure 10.8 Example of Data Reception Flowchart (Asynchronous Mode) (cont) |
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