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H838532H Datasheet(PDF) 350 Page - Renesas Technology Corp

Part # H838532H
Description  16-Bit Single-Chip Microcomputer H8 Family / H8/300H Super Low Power Series
PDF  508 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H838532H Datasheet(HTML) 350 Page - Renesas Technology Corp

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Section 10 Serial Communication Interface
Rev. 1.00 May 30, 2008 Page 330 of 484
REJ09B0436-0100
Receiving: Figure 10.13 shows an example of a flowchart for data reception. This procedure
should be followed for data reception after initializing SCI3.
Start
End
Read bit OER
in SSR
1
2
3
4
Read bit RDRF
in SSR
Overrun error
processing
4
Clear bit OER to
0 in SSR
Read receive
data in RDR
Clear bit RE to
0 in SCR3
Yes
OER = 1?
No
RDRF = 1?
Yes
Continue data
reception?
No
No
Yes
Overrun error
processing
End of overrun
error processing
Start overrun
error processing
Read bit OER in the serial status register
(SSR) to determine if there is an error.
If an overrun error has occurred, execute
overrun error processing.
Read SSR and check that bit RDRF is
set to 1. If it is, read the receive data in
RDR. When the RDR data is read, bit
RDRF is cleared to 0 automatically.
When continuing data reception, finish
reading of bit RDRF and RDR before
receiving the MSB (bit 7) of the current
frame. When the data in RDR is read,
bit RDRF is cleared to 0 automatically.
If an overrun error has occurred, read bit
OER in SSR, and after carrying out the
necessary error processing, clear bit OER
to 0. Reception cannot be resumed if bit
OER is set to 1.
1.
2.
3.
4.
Figure 10.13 Example of Data Reception Flowchart (Synchronous Mode)



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