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H838532H Datasheet(PDF) 328 Page - Renesas Technology Corp

Part # H838532H
Description  16-Bit Single-Chip Microcomputer H8 Family / H8/300H Super Low Power Series
PDF  508 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H838532H Datasheet(HTML) 328 Page - Renesas Technology Corp

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Section 10 Serial Communication Interface
Rev. 1.00 May 30, 2008 Page 308 of 484
REJ09B0436-0100
Table 10.7
Relation between n and Clock
SMR Setting
n
Clock
CKS1
CKS0
0
φ
0
0
0
φ
w/2
*1/
φ
w
*2
0
1
2
φ/16
1
0
3
φ/64
1
1
Notes: 1.
φw/2 clock in active (medium-speed/high-speed) mode and sleep mode
2.
φw clock in subactive mode and subsleep mode
In subactive or subsleep mode, SCI3 can be operated when CPU clock is
φw/2 only.
10.2.9
Clock Stop Register 1 (CKSTPR1)
—
TFCKSTP TCCKSTP TACKSTP
S31CKSTP S32CKSTP ADCKSTP TGCKSTP
7
6543210
1
1111111
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit
Initial value
Read/Write
CKSTPR1 is an 8-bit read/write register that performs module standby mode control for peripheral
modules. Only the bits relating to SCI3 are described here. For details of the other bits, see the
sections on the relevant modules.
Bit 6: SCI31 module standby mode control (S31CKSTP)
Bit 6 controls setting and clearing of module standby mode for SCI31.
S31CKSTP
Description
0
SCI31 is set to module standby mode
1
SCI31 module standby mode is cleared
(initial value)
Note:
All SCI31 register is initialized in module standby mode.



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