H8S2245 datasheet(351/818 Pages) RENESAS

351 / 818 page

Section 9 16-Bit Timer Pulse Unit (TPU)

Rev.3.00 Mar. 26, 2007 Page 309 of 772

REJ09B0355-0300

Bit 1—TGR Interrupt Enable B (TGIEB): Enables or disables interrupt requests (TGIB) by the

TGFB bit when the TGFB bit in TSR is set to 1.

Bit 1

TGIEB

Description

Interrupt requests (TGIB) by TGFB bit disabled

(Initial value)

Interrupt requests (TGIB) by TGFB bit enabled

Bit 0—TGR Interrupt Enable A (TGIEA): Enables or disables interrupt requests (TGIA) by the

TGFA bit when the TGFA bit in TSR is set to 1.

Bit 0

TGIEA

Description

Interrupt requests (TGIA) by TGFA bit disabled

(Initial value)

Interrupt requests (TGIA) by TGFA bit enabled

9.2.5

Timer Status Register (TSR)

—

TCFV

R/(W)*

TGFD

R/(W)*

TGFA

R/(W)*

TGFC

R/(W)*

TGFB

R/(W)*

Bit

Initial value

R/W

Note: * Can only be written with 0 for flag clearing.

Channel 0: TSR0

TCFD

—

TCFU

R/(W)*

TCFV

R/(W)*

—

TGFA

R/(W)*

—

TGFB

R/(W)*

Channel 1: TSR1

Channel 2: TSR2

Bit

Initial value

R/W

Note: * Can only be written with 0 for flag clearing.

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