H8S2245 datasheet(405/818 Pages) RENESAS

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Section 10 8-Bit Timers

Rev.3.00 Mar. 26, 2007 Page 363 of 772

REJ09B0355-0300

Section 10 8-Bit Timers

10.1

Overview

The H8S/2245 Group includes an 8-bit timer module with two channels (TMR0 and TMR1). Each

channel has an 8-bit counter (TCNT) and two time constant registers (TCORA and TCORB) that

are constantly compared with the TCNT value to detect compare match events. The 8-bit timer

module can thus be used for a variety of functions, including pulse output with an arbitrary duty

cycle.

10.1.1

Features

• Selection of four clock sources

The counters can be driven by one of three internal clock signals (

φ/8, φ/64, or φ/8192) or an

external clock input (enabling use as an external event counter).

• Selection of three ways to clear the counters

The counters can be cleared on compare match A or B, or by an external reset signal.

• Timer output control by a combination of two compare match signals

The timer output signal in each channel is controlled by a combination of two independent

compare match signals, enabling the timer to generate output waveforms with an arbitrary duty

cycle or PWM output.

• Provision for cascading of two channels

 Operation as a 16-bit timer is possible, using channel 0 for the upper 8 bits and channel 1

for the lower 8 bits (16-bit count mode).

 Channel 1 can be used to count channel 0 compare matches (compare match count mode).

• Three independent interrupts

Compare match A and B and overflow interrupts can be requested independently.

• Module stop mode can be set

 As the initial setting, 8-bit timer operation is halted. Register access is enabled by exiting

module stop mode.

H8S2245 Datasheet(PDF) 405 Page - Renesas Technology Corp