H8S2245 datasheet(409/818 Pages) RENESAS

409 / 818 page

Section 10 8-Bit Timers

Rev.3.00 Mar. 26, 2007 Page 367 of 772

REJ09B0355-0300

10.2.2

Time Constant Registers A0 and A1 (TCORA0, TCORA1)

R/W

TCORA0

TCORA1

Bit

Initial value

R/W

TCORA0 and TCORA1 are 8-bit readable/writable registers. TCORA0 and TCORA1 comprise a

single 16-bit register so they can be accessed together by word transfer instruction.

TCORA is continually compared with the value in TCNT. When a match is detected, the

corresponding CMFA flag of TCSR is set. Note, however, that comparison is disabled during the

T2 state of a TCORA write cycle.

The timer output can be freely controlled by these compare match signals and the settings of

output select bits OS1 and OS0 of TCSR.

TCORA0 and TCORA1 are each initialized to H'FF by a reset and in hardware standby mode.

10.2.3

Time Constant Registers B0 and B1 (TCORB0, TCORB1)

R/W

TCORB0

TCORB1

Bit

Initial value

R/W

TCORB0 and TCORB1 are 8-bit readable/writable registers. TCORB0 and TCORB1 comprise a

single 16-bit register so they can be accessed together by word transfer instruction.

TCORB is continually compared with the value in TCNT. When a match is detected, the

corresponding CMFB flag of TCSR is set. Note, however, that comparison is disabled during the

T2 state of a TCORB write cycle.

The timer output can be freely controlled by these compare match signals and the settings of

output select bits OS3 and OS2 of TCSR.

TCORB0 and TCORB1 are each initialized to H'FF by a reset and in hardware standby mode.

H8S2245 Datasheet(PDF) 409 Page - Renesas Technology Corp