HD6432351 datasheet(404/1025 Pages) RENESAS

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Section 9 I/O Ports

Rev. 3.00 Sep 15, 2006 page 370 of 988

REJ09B0330-0300

Port A MOS Pull-Up Control Register (PAPCR) [H8S/2351 Only]

PA7PCR

R/W

PA6PCR

R/W

PA5PCR

R/W

PA4PCR

R/W

PA3PCR

R/W

PA0PCR

R/W

PA2PCR

R/W

PA1PCR

R/W

Bit

Initial value

R/W

PAPCR is an 8-bit readable/writable register that controls the MOS input pull-up function

incorporated into port A on an individual bit basis.

All the bits are valid in modes 1 to 3, 6, and 7, and bits 7 to 5 are valid in modes 4 and 5. When a

PADDR bit is cleared to 0 (input port setting), setting the corresponding PAPCR bit to 1 turns on

the MOS input pull-up for the corresponding pin.

PAPCR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its

prior state after a manual reset, and in software standby mode.

Port A Open Drain Control Register (PAODR) [H8S/2351 Only]

PA7ODR

R/W

PA6ODR

R/W

PA5ODR

R/W

PA4ODR

R/W

PA3ODR

R/W

PA0ODR

R/W

PA2ODR

R/W

PA1ODR

R/W

Bit

Initial value

R/W

PAODR is an 8-bit readable/writable register that controls whether PMOS is on or off for each

port A pin (PA7 to PA0).

All bits are valid in modes 1 to 3, and 7.

Setting a PAODR bit to 1 makes the corresponding port A pin an NMOS open-drain output, while

clearing the bit to 0 makes the pin a CMOS output.

PAODR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its

prior state after a manual reset, and in software standby mode.

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