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HD6432351 Datasheet(PDF) 442 Page - Renesas Technology Corp |
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HD6432351 Datasheet(HTML) 442 Page - Renesas Technology Corp |
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442 / 1025 page  Section 9 I/O Ports Rev. 3.00 Sep 15, 2006 page 408 of 988 REJ09B0330-0300 Port G Register (PORTG) 7 — Undefined — 6 — Undefined — 5 — Undefined — 4 PG4 —* R 3 PG3 —* R 0 PG0 —* R 2 PG2 —* R 1 PG1 —* R Bit Initial value R/W Note: * Determined by state of pins PG4 to PG0. : : : PORTG is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of output data for the port G pins (PG4 to PG0) must always be performed on PGDR. Bits 7 to 5 are reserved; they return an undetermined value if read, and cannot be modified. If a port G read is performed while PGDDR bits are set to 1, the PGDR values are read. If a port G read is performed while PGDDR bits are cleared to 0, the pin states are read. After a power-on reset and in hardware standby mode, PORTG contents are determined by the pin states, as PGDDR and PGDR are initialized. PORTG retains its prior state after a manual reset, and in software standby mode. |
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