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HD6432351 Datasheet(PDF) 596 Page - Renesas Technology Corp

Part # HD6432351
Description  16-Bit Single-Chip Microcomputer
PDF  1025 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD6432351 Datasheet(HTML) 596 Page - Renesas Technology Corp

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Section 13 Serial Communication Interface (SCI)
Rev. 3.00 Sep 15, 2006 page 562 of 988
REJ09B0330-0300
Bit 2—Transmit End (TEND): Indicates that there is no valid data in TDR when the last bit of
the transmit character is sent, and transmission has been ended.
The TEND flag is read-only and cannot be modified.
Bit 2
TEND
Description
0
[Clearing conditions]
• When 0 is written to TDRE after reading TDRE = 1
• When the DMAC or DTC is activated by a TXI interrupt and write data to TDR
1
[Setting conditions]
(Initial value)
• When the TE bit in SCR is 0
• When TDRE = 1 at transmission of the last bit of a 1-byte serial transmit character
Bit 1—Multiprocessor Bit (MPB): When reception is performed using multiprocessor format in
asynchronous mode, MPB stores the multiprocessor bit in the receive data.
MPB is a read-only bit, and cannot be modified.
Bit 1
MPB
Description
0
[Clearing condition]
(Initial value)*
When data with a 0 multiprocessor bit is received
1
[Setting condition]
When data with a 1 multiprocessor bit is received
Note:
* Retains its previous state when the RE bit in SCR is cleared to 0 with multiprocessor
format.
Bit 0—Multiprocessor Bit Transfer (MPBT): When transmission is performed using
multiprocessor format in asynchronous mode, MPBT stores the multiprocessor bit to be added to
the transmit data.
The MPBT bit setting is invalid when multiprocessor format is not used, when not transmitting,
and in clocked synchronous mode.
Bit 0
MPBT
Description
0
Data with a 0 multiprocessor bit is transmitted
(Initial value)
1
Data with a 1 multiprocessor bit is transmitted



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