HD6432351 datasheet(639/1025 Pages) RENESAS

639 / 1025 page

Section 13 Serial Communication Interface (SCI)

Rev. 3.00 Sep 15, 2006 page 605 of 988

REJ09B0330-0300

Table 13.12 SCI Interrupt Sources

Channel

Interrupt

Source

Description

DTC

Activation

DMAC

Activation

Priority*

ERI

Interrupt due to receive error

(ORER, FER, or PER)

Not

possible

Not

possible

High

RXI

Interrupt due to receive data full

state (RDRF)

Possible

TXI

Interrupt due to transmit data empty

state (TDRE)

Possible

TEI

Interrupt due to transmission end

(TEND)

Not

possible

Not

possible

ERI

Interrupt due to receive error

(ORER, FER, or PER)

Not

possible

Not

possible

RXI

Interrupt due to receive data full

state (RDRF)

Possible

TXI

Interrupt due to transmit data empty

state (TDRE)

Possible

TEI

Interrupt due to transmission end

(TEND)

Not

possible

Not

possible

Low

Note:

* This table shows the initial state immediately after a reset. Relative priorities among

channels can be changed by means of the interrupt controller.

A TEI interrupt is requested when the TEND flag is set to 1 while the TEIE bit is set to 1. The

TEND flag is cleared at the same time as the TDRE flag. Consequently, if a TEI interrupt and a

TXI interrupt are requested simultaneously, the TXI interrupt may have priority for acceptance,

with the result that the TDRE and TEND flags are cleared. Note that the TEI interrupt will not be

accepted in this case.

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