HD6432351 datasheet(650/1025 Pages) RENESAS

650 / 1025 page

Section 14 Smart Card Interface

Rev. 3.00 Sep 15, 2006 page 616 of 988

REJ09B0330-0300

Bit 2—Smart Card Data Invert (SINV): Specifies inversion of the data logic level. This

function is used together with the SDIR bit for communication with an inverse convention card.

The SINV bit does not affect the logic level of the parity bit. For parity-related setting procedures,

see section 14.3.4, Register Settings.

Bit 2

SINV

Description

TDR contents are transmitted as they are

(Initial value)

Receive data is stored as it is in RDR

TDR contents are inverted before being transmitted

Receive data is stored in inverted form in RDR

Bit 1—Reserved: Read-only bit, always read as 1.

Bit 0—Smart Card Interface Mode Select (SMIF): Enables or disables the Smart Card interface

function.

Bit 0

SMIF

Description

Smart Card interface function is disabled

(Initial value)

Smart Card interface function is enabled

14.2.2

Serial Status Register (SSR)

Bit

TDRE

RDRF

ORER

ERS

PER

TEND

MPB

MPBT

Initial value :

R/W

R/(W)*

R/W

Note:

* Only 0 can be written to bits 7 to 3, to clear these flags.

Bit 4 of SSR has a different function in Smart Card interface mode. Coupled with this, the setting

conditions for bit 2, TEND, are also different.

Bits 7 to 5—Operate in the same way as for the normal SCI. For details, see section 13.2.7, Serial

Status Register (SSR).

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