HD6432351 datasheet(654/1025 Pages) RENESAS

654 / 1025 page

Section 14 Smart Card Interface

Rev. 3.00 Sep 15, 2006 page 620 of 988

REJ09B0330-0300

14.3

Operation

14.3.1

Overview

The main functions of the Smart Card interface are as follows.

• One frame consists of 8-bit data plus a parity bit.

• In transmission, a guard time of at least 2 etu (Elementary Time Unit: the time for transfer of

one bit) is left between the end of the parity bit and the start of the next frame.

• If a parity error is detected during reception, a low error signal level is output for one etu

period, 10.5 etu after the start bit.

• If the error signal is sampled during transmission, the same data is transmitted automatically

after the elapse of 2 etu or longer.

• Only asynchronous communication is supported; there is no clocked synchronous

communication function.

14.3.2

Pin Connections

Figure 14.2 shows a schematic diagram of Smart Card interface related pin connections.

In communication with an IC card, since both transmission and reception are carried out on a

single data transmission line, the TxD pin and RxD pin should be connected with the LSI pin. The

data transmission line should be pulled up to the VCC power supply with a resistor.

When the clock generated on the Smart Card interface is used by an IC card, the SCK pin output is

input to the CLK pin of the IC card. No connection is needed if the IC card uses an internal clock.

LSI port output is used as the reset signal.

Other pins must normally be connected to the power supply or ground.

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