HD6432351 datasheet(660/1025 Pages) RENESAS

660 / 1025 page

Section 14 Smart Card Interface

Rev. 3.00 Sep 15, 2006 page 626 of 988

REJ09B0330-0300

14.3.5

Clock

Only an internal clock generated by the on-chip baud rate generator can be used as the

transmit/receive clock for the smart card interface. The bit rate is set with BRR and the CKS1 and

CKS0 bits in SMR. The formula for calculating the bit rate is as shown below. Table 14.5 shows

some sample bit rates.

If clock output is selected by setting CKE0 to 1, a clock with a frequency of 372 times the bit rate

is output from the SCK pin.

B =

1488

× 22n

–1 × (N + 1)

× 106

Where: N = Value set in BRR (0

≤ N ≤ 255)

B = Bit rate (bit/s)

φ = Operating frequency (MHz)

n = See table 14.4

Table 14.4 Correspondence between n and CKS1, CKS0

CKS1

CKS0

Table 14.5 Examples of Bit Rate B (bit/s) for Various BRR Settings (When n = 0)

φφφφ (MHz)

10.00

10.714

13.00

14.285

16.00

18.00

20.00

13441

14400

17473

19200

21505

24194

26882

6720

7200

8737

9600

10753

12097

13441

4480

4800

5824

6400

7168

8065

8961

Note: Bit rates are rounded to the nearest whole number.

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