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HD6432351 Datasheet(PDF) 747 Page - Renesas Technology Corp |
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HD6432351 Datasheet(HTML) 747 Page - Renesas Technology Corp |
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747 / 1025 page ![]() Section 21 Electrical Characteristics Rev. 3.00 Sep 15, 2006 page 713 of 988 REJ09B0330-0300 Condition A Condition B Item Symbol Min Max Min Max Unit Test Conditions Read data access time 4 tACC4 — 2.5 × tcyc –50 — 2.5 × tcyc –25 ns Figure 21.8 to Figure 21.15 Read data access time 5 tACC5 — 3.0 × tcyc –50 — 3.0 × tcyc –25 ns WR delay time 1 tWRD1 — 40 — 20 ns WR delay time 2 tWRD2 — 40 — 20 ns WR pulse width 1 tWSW1 1.0 × tcyc –40 — 1.0 × tcyc –20 — ns WR pulse width 2 tWSW2 1.5 × tcyc –40 — 1.5 × tcyc –20 — ns Write data delay time tWDD — 60 — 30 ns Write data setup time tWDS 0.5 × tcyc –40 — 0.5 × tcyc –20 — ns Write data hold time tWDH 0.5 × tcyc –20 — 0.5 × tcyc –10 — ns WR setup time tWCS 0.5 × tcyc –20 — 0.5 × tcyc –10 — ns WR hold time tWCH 0.5 × tcyc –20 — 0.5 × tcyc –10 — ns CAS setup time tCSR 0.5 × tcyc –20 — 0.5 × tcyc –10 — ns Figure 21.12 WAIT setup time tWTS 60 — 30 — ns Figure 21.10 WAIT hold time tWTH 10 — 5 — ns BREQ setup time tBRQS 60 — 30 — ns Figure 21.16 BACK delay time tBACD — 30 — 15 ns Bus-floating time tBZD — 100 — 50 ns BREQO delay time tBRQOD — 60 — 30 ns Figure 21.17 |
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