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HD64F2149YV Datasheet(PDF) 499 Page - Renesas Technology Corp |
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HD64F2149YV Datasheet(HTML) 499 Page - Renesas Technology Corp |
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499 / 1075 page  Section 15 Serial Communication Interface (SCI, IrDA) Rev. 3.00 Jan 18, 2006 page 471 of 1044 REJ09B0280-0300 Figure 15.11 shows an example of SCI operation for transmission using a multiprocessor format. TDRE TEND 0 1 frame D0 D1 D7 0/1 1 0 D0 D1 D7 0/1 1 1 1 Data Start bit Multi- proce- ssor bit Stop bit Start bit Data Multi- proces- sor bit Stop bit TXI interrupt request generated Data written to TDR and TDRE flag cleared to 0 in TXI interrupt handling routine TEI interrupt request generated Idle state (mark state) TXI interrupt request generated Figure 15.11 Example of SCI Operation in Transmission (Example with 8-Bit Data, Multiprocessor Bit, One Stop Bit) Multiprocessor Serial Data Reception: Figure 15.12 shows a sample flowchart for multiprocessor serial reception. The following procedure should be used for multiprocessor serial data reception. |
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