HD64F2149YV datasheet(590/1075 Pages) RENESAS

590 / 1075 page

Section 17 Keyboard Buffer Controller

Rev. 3.00 Jan 18, 2006 page 562 of 1044

REJ09B0280-0300

17.2

17.2.1

Keyboard Control Register H (KBCRH)

Bit

76543210

KBIOE

KCLKI

KDI

KBFSEL

KBIE

KBF

PER

KBS

Initial value

01110000

Read/Write

R/W

R/(W)*

Note:

Only 0 can be written, to clear the flags.

KBCRH is an 8-bit readable/writable register that indicates the operating status of the keyboard

buffer controller.

KBCRH is initialized to H'70 by a reset, and in standby mode, watch mode, subactive mode,

subsleep mode, and module stop mode. Bits 6, 5, and 2 to 0 are also initialized when KBIOE is

cleared to 0.

Bit 7—Keyboard In/Out Enable (KBIOE): Selects whether or not the keyboard buffer

controller is used. When KBIOE is set to 1, the keyboard buffer controller is enabled for

transmission and reception and the port pins function as KCLK and KD I/O pins. When KBIOE is

cleared to 0, the keyboard buffer controller stops functioning and the port pins go to the high-

impedance state.

Bit 7

KBIOE

Description

The keyboard buffer controller is non-operational (KCLK and KD signal pins have

port functions)

(Initial value)

The keyboard buffer controller is enabled for transmission and reception (KCLK and

KD signal pins are in the bus drive state)

Bit 6—Keyboard Clock In (KCLKI): Monitors the KCLK I/O pin. This bit cannot be modified.

Bit 6

KCLKI

Description

KCLK I/O pin is low

KCLK I/O pin is high

(Initial value)

HD64F2149YV Datasheet(PDF) 590 Page - Renesas Technology Corp

HD64F2149YV Datasheet(HTML) 590 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL