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HD64F2149YV Datasheet(PDF) 594 Page - Renesas Technology Corp |
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HD64F2149YV Datasheet(HTML) 594 Page - Renesas Technology Corp |
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594 / 1075 page ![]() Section 17 Keyboard Buffer Controller Rev. 3.00 Jan 18, 2006 page 566 of 1044 REJ09B0280-0300 Bit 3 Bit 2 Bit 1 Bit 0 RXCR3 RXCR2 RXCR1 RXCR0 Receive Data Contents 0 0 0 0 — (Initial value) 1 Start bit 1 0 KB0 1 KB1 1 0 0 KB2 1 KB3 1 0 KB4 1 KB5 10 00KB6 1 KB7 1 0 Parity bit 1— 1 ——— 17.2.3 Keyboard Data Buffer Register (KBBR) Bit 76543210 KB7 KB6 KB5 KB4 KB3 KB2 KB1 KB0 Initial value 00000000 Read/Write RRRRRRRR KBBR is a read-only register that stores receive data. Its value is valid only when KBF = 1. KBBR is initialized to H'00 by a reset, in standby mode, watch mode, subactive mode, subsleep mode, and module stop mode, and when KBIOE is cleared to 0. |
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