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M32C/86 Datasheet(PDF) 485 Page - Renesas Technology Corp |
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M32C/86 Datasheet(HTML) 485 Page - Renesas Technology Corp |
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485 / 505 page  Page 462 9 7 4 f o 5 0 0 2 , 8 0 . p e S 0 0 . 1 . v e R 0 0 1 0 - 4 0 2 0 B 9 0 J E R ) T 6 8 / C 2 3 M , 6 8 / C 2 3 M ( p u o r G 6 8 / C 2 3 M 27.7.4 Watchdog Timer Interrupt Reset the watchdog timer after a watchdog timer interrupt occurs. 27.7.5 Changing Interrupt Control Register To change the interrupt control register while the interrupt request is denied, follow the instructions below. Changing IR bit The IR bit setting may not change to "0" (no interrupt requested) depending on the instructions written. If this is a problem, use the following instruction to change the register: MOV Changing Bits Except IR Bit When an interrupt request is generated while executing an instruction, the IR bit may not be set to "1" (interrupt requested) and the interrupt may be ignored. If this is a problem, use the following instructions to change the register: AND, OR, BCLR, BSET 27.7.6 Changing IIOiIR Register (i = 0 to 5, 8 to 11) Use the following instructions to set bits 1 to 7 in the IIOilR register to "0" (no interrupt requested): AND, BCLR 27.7.7 Changing RLVL Register The DMAII bit is indeterminate after reset. When using the DMAII bit to generate an interrupt, set the interrupt control register after setting the DMAII bit to "0" (interrupt priority level 7 available for interrupts). 27. Precautions (Interrupts) |
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