R8C20 datasheet(49/501 Pages) RENESAS

49 / 501 page

R8C/20 Group, R8C/21 Group

6. Voltage Detection Circuit

Rev.2.00 Aug 27, 2008

Page 33 of 458

REJ09B0250-0200

Figure 6.6

VW2C Register

Voltage Monitor 2 Circuit Control Register

(1)

Symbol

Address

After Reset(8)

VW2C

0037h

00h

Bit Symbol

Bit Name

Function

NOTES:

b3 b2

0 : Not detected

1 : Vdet2 pass detected

b1 b0

b7 b6 b5 b4

VW2C0

Voltage monitor 2 interrupt/reset

enable bit(6)

0 : Disable

1 : Enable

0 : Digital filter enabled mode

(digital filter circuit enabled)

1 : Digital filter disabled mode

(digital filter circuit disabled)

VW2C2

Voltage change detection

flag(3,4,8)

VW2C1

Voltage monitor 2 digital filter

disabled mode select bit(2)

VW2C3

WDT detection flag(4,8)

VW2F1

Sampling clock select bits

b5 b4

0 0 : fOCO-S divide-by-1

0 1 : fOCO-S divide-by-2

1 0 : fOCO-S divide-by-4

1 1 : fOCO-S divide-by-8

VW2F0

0 : Not detected

1 : Detected

VW2C6

Voltage monitor 2 circuit mode

select bit(5)

0 : Voltage monitor 2 interrupt mode

1 : Voltage monitor 2 reset mode

VW2C7

Voltage monitor 2 interrupt/reset

generation condition select

bit(7,9)

0 : When VCC reaches Vdet2 or above

1 : When VCC reaches Vdet2 or below

When the VW2C6 bit is set to 1 (voltage monitor 2 reset mode), set the VW2C7 bit to 1 (w hen VCC reaches to Vdet2

or below ) (do not set to 0).

Set the PRC3 bit in the PRCR register to 1 (enables w riting) before w riting to the VW2C register. When w riting the

VW2C register, the VW2C2 bit may be set to 1. Set the VW2C2 bit to 0 after w riting the VW2C register.

When the voltage monitor 2 interrupt is used to exit stop mode and to return again, w rite 0 to the VW2C1 bit before

w riting 1.

This bit is enabled w hen the VCA27 bit in the VCA2 register is set to 1 (voltage detection 2 circuit enabled).

Set this bit to 0 by a program. When w riting 0 by a program, it is set to 0 (it remains unchanged even if it is set to 1).

This bit is enabled w hen the VW2C0 bit is set to 1 (voltage monitor 2 interrupt/enables reset).

The VW2C0 bit is enabled w hen the VCA27 bit in the VCA2 register is set to 1 (voltage detection 2 circuit enabled).

Set the VW2C0 bit to 0 (disable) w hen the VCA27 bit is set to 0 (voltage detection 2 circuit disabled).

The VW2C7 bit is enabled w hen the VW2C1 bit is set to 1 (digital filter disabled mode).

The VW2C2 and VW2C3 bits remain unchanged in the softw are reset, w atchdog timer reset and voltage monitor 2

reset.

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