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4551 Datasheet(PDF) 91 Page - Renesas Technology Corp |
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4551 Datasheet(HTML) 91 Page - Renesas Technology Corp |
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91 / 155 page ![]() APPLICATION 2.2 Interrupts 2-13 4551 Group User’s Manual Fig. 2.2.2 External interrupt setting example Note: The valid waveforms causing the interrupt must be retained at their level for 4 cycles or more of system clock. Set Port Port used for external interrupt is set to input port. Set to input (SD instruction) Clear the external interrupt activated condition (SNZ0 instruction) !! ! 0 b3 b0 b3 b0 ! 1 !! b0 b3 ! 0 !! Interrupt enable flag INTE Interrupt control register V1 “0” Disable Interrupts External interrupt is temporarily disabled. All interrupts disabled (DI instruction) External interrupt occur disabled (TV1A instruction) Port D5 output latch “1” Set Valid Waveform Valid waveform of INT pin is selected. Interrupt control register I1 Interrupt control register I1 Rising waveform selected (TI1A instruction) Falling waveform selected (TI1A instruction) g Note when interrupt valid waveform is changed When is executed, depending on the input state of INT pin, the interrupt request flag EXF0 may be set to “1.” Accordingly, insert the NOP instruction after the TI1A instruction. Clear Interrupt Request External interrupt activated condition is cleared. External interrupt request flag EXF0 “0” g Note when interrupt request is cleared When is executed, considering the skip of the next instruction according to the interrupt request flag EXF0, insert the NOP instruction after the SNZ0 instruction. Enable Interrupts External interrupt which is temporarily disabled is enabled. Interrupt control register V1 Interrupt enable flag INTE External interrupt occur enabled (TV1A instruction) All interrupts enabled (EI instruction) b3 b0 !!! 1 “1” External interrupt execution started “!” : it can be “0” or “1.” |
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