7220 datasheet(10/303 Pages) RENESAS

10 / 303 page

Table of contents

7220 Group User’s Manual

CHAPTER 6. APPENDIX

6.1 Package outline ..................................................................................................................... 6-2

6.2 Termination of unused pins ............................................................................................... 6-3

6.3 Notes on use ......................................................................................................................... 6-4

6.3.1 Notes on processor status register ............................................................................. 6-4

6.3.2 Notes on decimal operation ......................................................................................... 6-5

6.3.3 Notes on Interrupts ........................................................................................................ 6-5

6.3.4 Notes on serial I/O ........................................................................................................ 6-6

6.3.5 Notes on timer ............................................................................................................... 6-7

6.3.6 Notes on A-D comparator ............................................................................................. 6-8

6.3.7 Note on RESET pin ....................................................................................................... 6-8

6.3.8 Notes on input and output pins ................................................................................... 6-9

6.3.9 Note on JMP instruction ............................................................................................... 6-9

6.3.10 Note on multi-master I2C-BUS interface ................................................................. 6-10

6.3.11 Termination of unused pins ...................................................................................... 6-10

6.4 Counter measures against noise .................................................................................... 6-11

6.4.1 Shortest wiring length ................................................................................................. 6-11

6.4.2 connection of a bypass capacitor across VSS line and VCC line ............................ 6-13

6.4.3 Wiring to analog input pins ........................................................................................ 6-13

6.4.4 Oscillator concerns ...................................................................................................... 6-14

6.4.5 Setup for I/O ports ...................................................................................................... 6-15

6.4.6 Providing of watchdog timer function by software .................................................. 6-16

6.5 Memory assignment ........................................................................................................... 6-17

6.6 SFR assignment .................................................................................................................. 6-20

6.7 Control registers ................................................................................................................. 6-30

6.8 Ports ...................................................................................................................................... 6-51

6.9 Machine instruction table .................................................................................................. 6-53

6.10 Instruction code table ...................................................................................................... 6-63

6.11 Mask ROM ordering method ........................................................................................... 6-64

6.12 Mark specification form ................................................................................................... 6-80

7220 Datasheet(PDF) 10 Page - Renesas Technology Corp