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H83004 Datasheet(PDF) 86 Page - Renesas Technology Corp |
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H83004 Datasheet(HTML) 86 Page - Renesas Technology Corp |
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86 / 497 page  5.2 Register Descriptions 5.2.1 System Control Register (SYSCR) SYSCR is an 8-bit readable/writable register that controls software standby mode, selects the action of the UI bit in CCR, selects the NMI edge, and enables or disables the on-chip RAM. Only bits 3 and 2 are described here. For the other bits, see section 3.3, System Control Register (SYSCR). SYSCR is initialized to H'0B by a reset and in hardware standby mode. It is not initialized in software standby mode. Bit Initial value Read/Write 7 SSBY 0 R/W 6 STS2 0 R/W 5 STS1 0 R/W 4 STS0 0 R/W 3 UE 1 R/W 0 RAME 1 R/W 2 NMIEG 0 R/W 1 — 1 R/W Software standby Standby timer select 2 to 0 User bit enable Selects whether to use CCR bit 6 as a user bit or interrupt mask bit NMI edge select Selects the NMI input edge Reserved bit RAM enable 72 |
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