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38C3_M Datasheet(PDF) 73 Page - Renesas Technology Corp |
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38C3_M Datasheet(HTML) 73 Page - Renesas Technology Corp |
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73 / 224 page ![]() 2-8 38C3 Group User’s Manual APPLICATION 2.1 I/O port 2.1.4 Notes on I/O port (1) Notes in standby state In standby state]1 for low-power dissipation, do not make input levels of an input port and an I/O port “undefined”. Pull-up (connect the port to VCC) or pull-down (connect the port to VSS) these ports through a resistor. When determining a resistance value, note the following points: • External circuit • Variation of output levels during the ordinary operation When using built-in pull-up resistor, note on varied current values: • When setting as an input port : Fix its input level • When setting as an output port : Prevent current from flowing out to external l Reason The potential which is input to the input buffer in a microcomputer is unstable in the state that input levels of a input port and an I/O port are “undefined”. This may cause power source current. ]1 standby state: stop mode by executing STP instruction wait mode by executing WIT instruction (2) Modifying port latch of I/O port with bit managing instruction When the port latch of an I/O port is modified with the bit managing instruction]2, the value of the unspecified bit may be changed. l Reason The bit managing instructions are read-modify-write form instructions for reading and writing data by a byte unit. Accordingly, when these instructions are executed on a bit of the port latch of an I/O port, the following is executed to all bits of the port latch. •As for bit which is set for input port: The pin state is read in the CPU, and is written to this bit after bit managing. •As for bit which is set for output port: The bit value is read in the CPU, and is written to this bit after bit managing. Note the following: •Even when a port which is set as an output port is changed for an input port, its port latch holds the output data. •As for a bit of which is set for an input port, its value may be changed even when not specified with a bit managing instruction in case where the pin state differs from its port latch contents. ]2 Bit managing instructions: SEB and CLB instructions (3) Pull-up/Pull-down control When each port which has built-in pull-up/pull-down resistor (P0, P1, P2, P4, P50, P52–P57, P6, P7, P8) is set to output port, pull-up/pull-down control of corresponding port become invalid. (Pull-up/Pull- down cannot be set.) l Reason Pull-up control is valid only when each direction register is set to the input mode. |
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