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MPC5200CVR466B Datasheet(PDF) 25 Page - Freescale Semiconductor, Inc |
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MPC5200CVR466B Datasheet(HTML) 25 Page - Freescale Semiconductor, Inc |
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25 / 72 page ![]() MPC5200B Data Sheet, Rev. 3 Freescale Semiconductor 25 Figure 11. Timing Diagram—Non-MUXed Mode 1.3.8.2 Burst Mode Table 25. Burst Mode Timing Sym Description Min Max Units Notes SpecID tCSA PCI CLK to CS assertion 4.6 10.6 ns A7.22 tCSN PCI CLK to CS negation 2.9 7.0 ns A7.23 t1 CS pulse width (1+WS+4LB*2*(32/DS))* tPCIck (1+WS+4LB*2*(32/DS)) *tPCIck ns (1),(2) A7.24 t2 ADDR valid before CS assertion tIPBIck tPCIck ns A7.25 t3 ADDR hold after CS negation -0.7 - ns A7.26 t4 OE assertion before CS assertion - 4.8 ns A7.27 t5 OE negation before CS negation - 2.7 ns A7.28 t6 RW valid before CS assertion tPCIck - ns A7.29 t7 RW hold after CS negation tPCIck - ns A7.30 t8 DATA setup before rising edge of PCI clock 3.6 - ns A7.31 ADDR DATA (rd) CS[x] R/W DATA (wr) OE t10 t11 TS t2 t6 t8 t7 t4 t3 t9 TSIZ[1:2] t5 t17 t16 ACK t12 t13 t14 t15 t1 PCI CLK t18 t19 |
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