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LPC2292 Datasheet(PDF) 12 Page - NXP Semiconductors |
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LPC2292 Datasheet(HTML) 12 Page - NXP Semiconductors |
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12 / 53 page ![]() LPC2292_2294_7 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 7 — 4 December 2008 12 of 53 NXP Semiconductors LPC2292/LPC2294 16/32-bit ARM microcontrollers with external memory interface P2[24]/D24 11[7] E2[7] I/O D24 — External memory data line 24. P2[25]/D25 12[7] E1[7] I/O D25 — External memory data line 25. P2[26]/D26/ BOOT0 13[7] F4[7] I/O D26 — External memory data line 26. I BOOT0 — While RESET is low, together with BOOT1 controls booting and internal operation. Internal pull-up ensures high state if pin is left unconnected. P2[27]/D27/ BOOT1 16[7] F1[7] I/O D27 — External memory data line 27. I BOOT1 — While RESET is low, together with BOOT0 controls booting and internal operation. Internal pull-up ensures high state if pin is left unconnected. BOOT1:0 = 00 selects 8-bit memory on CS0 for boot. BOOT1:0 = 01 selects 16-bit memory on CS0 for boot. BOOT1:0 = 10 selects 32-bit memory on CS0 for boot. BOOT1:0 = 11 selects internal flash memory. P2[28]/D28 17[7] G2[7] I/O D28 — External memory data line 28. P2[29]/D29 18[7] G1[7] I/O D29 — External memory data line 29. P2[30]/D30/ AIN4 19[6] G3[6] I/O D30 — External memory data line 30. I AIN4 — ADC, input 4. This analog input is always connected to its pin. P2[31]/D31/ AIN5 20[6] G4[6] I/O D31 — External memory data line 31. I AIN5 — ADC, input 5. This analog input is always connected to its pin. P3[0] to P3[31] I/O Port 3 — Port 3 is a 32-bit bidirectional I/O port with individual direction controls for each bit. The operation of port 3 pins depends upon the pin function selected via the Pin Connect Block. P3[0]/A0 89[7] G12[7] O A0 — External memory address line 0. P3[1]/A1 88[7] H13[7] O A1 — External memory address line 1. P3[2]/A2 87[7] H12[7] O A2 — External memory address line 2. P3[3]/A3 81[7] J10[7] O A3 — External memory address line 3. P3[4]/A4 80[7] K13[7] O A4 — External memory address line 4. P3[5]/A5 74[7] M13[7] O A5 — External memory address line 5. P3[6]/A6 73[7] N13[7] O A6 — External memory address line 6. P3[7]/A7 72[7] M12[7] O A7 — External memory address line 7. P3[8]/A8 71[7] N12[7] O A8 — External memory address line 8. P3[9]/A9 66[7] M10[7] O A9 — External memory address line 9. P3[10]/A10 65[7] N10[7] O A10 — External memory address line 10. P3[11]/A11 64[7] K9[7] O A11 — External memory address line 11. P3[12]/A12 63[7] L9[7] O A12 — External memory address line 12. P3[13]/A13 62[7] M9[7] O A13 — External memory address line 13. P3[14]/A14 56[7] K7[7] O A14 — External memory address line 14. P3[15]/A15 55[7] L7[7] O A15 — External memory address line 15. P3[16]/A16 53[7] M7[7] O A16 — External memory address line 16. Table 4. Pin description …continued Symbol Pin (LQFP) Pin (TFBGA)[1] Type Description |
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