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CS2000-OTP Datasheet(PDF) 12 Page - Cirrus Logic

Part # CS2000-OTP
Description  Fractional-N Clock Synthesizer & Clock Multiplier
PDF  30 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS2000-OTP Datasheet(HTML) 12 Page - Cirrus Logic

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CS2000-OTP
12
DS758PP1
main unlocked for the specified time listed in the “AC Electrical Characteristics” on page 7 after which lock
will be acquired and the PLL output will resume.
f CLK_IN is removed and then reapplied within 223 SysClk cycles but later than tCS, the ClkSkipEn pa-
rameter will have no effect and the PLL output will continue until CLK_IN is re-applied (see Figure 8).
Once CLK_IN is re-applied, the PLL will go unlocked only for the time it takes to acquire lock; the
PLL_OUT state will be determined by the ClkOutUnl parameter during this time.
If CLK_IN is removed and then re-applied within tCS, the ClkSkipEn parameter determines whether
PLL_OUT continues while the PLL re-acquires lock (see Figure 9). When ClkSkipEn is disabled and
CLK_IN is removed the PLL output will continue until CLK_IN is re-applied at which point the PLL will go
unlocked only for the time it takes to acquire lock; the PLL_OUT state will be determined by the ClkOutUnl
parameter during this time. When ClkSkipEn is enabled and CLK_IN is removed the PLL output clock will
Figure 7. CLK_IN removed for > 223 SysClk cycles
CLK_IN
PLL_OUT
UNLOCK
ClkSkipEn=0 or 1
ClkOutUnl=0
Lock Time
CLK_IN
PLL_OUT
UNLOCK
ClkSkipEn=0 or 1
ClkOutUnl=1
Lock Time
= invalid clocks
223 SysClk cycles
223 SysClk cycles
Figure 8. CLK_IN removed for < 223 SysClk cycles but > tCS
CLK_IN
PLL_OUT
UNLOCK
ClkSkipEn=0 or 1
ClkOutUnl=0
Lock Time
CLK_IN
PLL_OUT
UNLOCK
ClkSkipEn=0 or 1
ClkOutUnl=1
Lock Time
tCS
tCS
= invalid clocks
223 SysClk cycles
223 SysClk cycles



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