CDB4265 datasheet(39/56 Pages) CIRRUS

39 / 56 page

DS657F2

CS4265

6.6

Signal Selection - Address 06h

6.6.1

DAC SDIN Source (Bit 7)

Function:

This bit is used to select the serial audio data source for the DAC as shown in Table 11.

6.6.2

Digital Loopback (Bit 1)

Function:

When this bit is set, an internal digital loopback from the ADC to the DAC will be enabled. Please refer to

“Internal Digital Loopback” on page 28.

6.7

Channel B PGA Control - Address 07h

6.7.1

Channel B PGA Gain (Bits 5:0)

Function:

See “Channel A PGA Gain (Bits 5:0)” on page 39.

6.8

Channel A PGA Control - Address 08h

6.8.1

Channel A PGA Gain (Bits 5:0)

Function:

Sets the gain or attenuation for the ADC input PGA stage. The gain may be adjusted from -12 dB to

+12 dB in 0.5 dB steps. The gain bits are in two’s complement with the Gain0 bit set for a 0.5 dB step.

ample settings.

432

SDINSel

Reserved

LOOP

Reserved

SDINSel Setting

DAC Data Source

0SDIN1

1SDIN2

Table 11. DAC SDIN Source Selection

432

Reserved

Gain5

Gain4

Gain3

Gain2

Gain1

Gain0

432

Reserved

Gain5

Gain4

Gain3

Gain2

Gain1

Gain0

Gain[5:0]

Setting

101000

-12 dB

000000

0 dB

011000

+12 dB

Table 12. Example Gain and Attenuation Settings

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