ML2722

DS2722-F-06

FINAL DATASHEET

DECEMBER 2005 13

FUNCTIONAL DESCRIPTION

The ML2722 enables the design and manufacture of low-cost, high-performance FSK transceivers. It can also be used

as a 900MHz digital cordless telephone transceiver. Integral to the ML2722 is a low-IF receiver whose LO port is driven

from an internal synthesizer. Included are image rejection IF filters, limiters, discriminator, data slicers, and baseband

low-pass data filters. It also contains internal voltage regulators to protect critical circuits from power supply noise and

transmit modulation circuits.

The ML2722 is designed to transmit and receive 1.536M chips per second in 2.048MHz spaced channels in the 902 to

928MHz ISM band. A single synthesizer is used for both the receiver and the FSK transmitter. The phase locked loop

(PLL) is completely integrated, including the voltage controlled oscillator (VCO), tuning circuits, and VCO resonator.

The ML2722 has an internal control interface that programs the synthesizer, the mode of operation, the external LNA

and PA, and provides a convenient and flexible interface to various baseband processors. For power level monitoring

an RSSI block is included.

In RECEIVE MODE, the ML2722 is a single conversion low IF receiver. The demodulation is followed by a matched bit

rate filter and a data slicer. The sliced data is provided to a baseband chip for despreading. All channel filtering and

demodulation is performed using active filters, which are automatically aligned. A matched bit rate filter and a data

slicer follow the demodulator. The sliced data is provided at the DOUT pin.

In TRANSMIT MODE, the ML2722 uses the Receive mode VCO and frequency division, with a driver amplifier

providing typically -1dBm output to feed the power amplifier. The PLL frequency synthesizer loop is opened during the

transmit time slot, and the VCO is directly modulated by low-pass filtered circuits from the internal modulation filter.

The ML2722 uses multiple voltage regulators to protect sensitive internal circuits from power supply noise. Separate

regulators supply the PLL dividers, RF circuits and IF circuits. Each of these regulators takes its power from VCC5, and

supplies power internally to its respective RVCCn pin. External capacitors are required at each RVCCn pin to decouple

the outputs of the internal regulators. The VCO regulator takes its power from the VCC2 pin which is normally

connected to the RVCC6 (pin 27) or RVCC7 (pin 29). An external decoupling capacitor is also used on the internal

bandgap voltage reference to improve the noise performance of the regulators.

The integrated PLL frequency synthesizer includes a fully integrated VCO, prescaler, phase detector and charge pump.

The reference frequency is generated from the incoming signal at the REF pin, which can be either 6.144MHz or

12.288MHz. The loop filter is external to allow customers to optimize their loop bandwidth to their system’s lock time

and in-band phase noise requirements. This frequency-agile synthesizer allows the ML2722 to be used in frequency

hopped spread spectrum (FHSS) applications with nominal channel spacing of 2.048MHz. Carrier frequency is

programmed via the configuration registers and 3-wire serial interface. The VCO tank circuit (inductor and varactor) is

fully integrated.

Example 38kHz Loop Filter

2.2nF

470

Ω

22nF

RVCC3

QPO

VTUNE