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ATAM862-4 Datasheet(PDF) 21 Page - ATMEL Corporation |
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ATAM862-4 Datasheet(HTML) 21 Page - ATMEL Corporation |
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21 / 110 page  21 4551G–4BMCU–07/07 ATAM862-4 Figure 16-5. Interrupt Handling 7 6 5 4 3 2 1 0 INT5 active INT7 active INT2 pending SWI0 INT2 active INT0 pending INT0 active INT2 RTI RTI INT5 INT3 active INT3 RTI RTI RTI INT7 Time Main / Autosleep Main / Autosleep Table 16-1. Interrupt Priority Interrupt Priority ROM Address Interrupt Opcode Function INT0 Lowest 040h C8h (SCALL 040h) Software interrupt (SWI0) INT1 | 080h D0h (SCALL 080h) External hardware interrupt, any edge at BP52 or BP53 INT2 | 0C0h D8h (SCALL 0C0h) Timer 1 interrupt INT3 | 100h E8h (SCALL 100h) SSI interrupt or external hardware interrupt at BP40 or BP43 INT4 | 140h E8h (SCALL 140h) Timer 2 interrupt INT5 | 180h F0h (SCALL 180h) Timer 3 interrupt INT6 | 1C0h F8h (SCALL 1C0h) External hardware interrupt, at any edge at BP50 or BP51 INT7 Highest 1E0h FCh (SCALL 1E0h) Voltage monitor (VM) interrupt |
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