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F75111RG Datasheet(PDF) 6 Page - Feature Integration Technology Inc. |
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F75111RG Datasheet(HTML) 6 Page - Feature Integration Technology Inc. |
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6 / 45 page  July, 2007 V0.27P - 4 - F75111 1. General Description F75111 is a low power general purpose IO chip providing 20 GPIO. Most GPIO pins can be programmed to be power LED. Level or pulse modes can be programmed by registers. Two power-down modes (manual or Smart) can be selected to save power and control the total consumption under 10uA, so F75111 can fit the requirement of mobile device such as Smart Phone, PDA or cell phone. 2. Features Support up to 20 GPIO pins Two power down mode selection --- Manual or Smart Power Management mode 15 pins can be programmed to be LED Each GPIO pin can be programmed to be high/low level or pulse Each GPIO pin has de-bounce function Two sets of watch dog timer SMBus address selected pin to expand up to 2 devices SMBus interface 3VCC operation Package in 28-SSOP(150mil) / 24QFN package(4mm x 4mm) 3. Key Specifications Supply Voltage 3.0V to 3.6V Operating Supply Current 300uA typ. Power Down Current 3uA typ. |
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