5

HV57009

•

•

•

•

•

•

Latch

Latch

Latch

Latch

Programmable

Current

BL

LE

SR2

SR1

CLK

DIR

-IN

I/O

I/O

Inputs

Outputs

Function

Data In

CLK

LE

BL

DIR

Shift Reg

HV Outputs

Data Out

All O/P High

X

X

L

H

H

H

H

Data Stored in Latches

X

L

H

I/O Relation

H

H

L

H

L

H

H

H

X

L

H

X

D

D

D

D

Figure 4: Function Table

X

X

X

X

H

H

L

L

*

L....L

H....H

*

Q

Q

Q

Q

ON

ON

OFF

New ON or OFF

Previous ON or OFF

Previous ON or OFF

New ON or OFF

Notes:

* = dependent on previous stage’s state. See Figure 7 for D

H = V

L = V

SS

Note: Each SR (shift register) provides 32 outputs. SR1 supplies outputs 1 to 32 and SR2 supplies outputs 33 to 64.

Figure 3: Functional Block Diagram

Inversion of

Stored Data

Data Falls Through

(Latches Tansparent)

*

L

H

*

D

D

D

D