LTC2496 datasheet(21/32 Pages) LINER

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LTC2496

2496fa

APPLICATIONS INFORMATION

Figure 7. Internal Serial Clock, Single Cycle Operation

Internal Serial Clock, Single Cycle Operation

This timing mode uses the internal serial clock to shift out

the conversion result and ⎯C⎯S to monitor and control the

state of the conversion cycle, see Figure 7.

In order to select the internal serial clock timing mode,

the serial clock pin (SCK) must be ﬂoating or pulled HIGH

before the conclusion of the POR cycle and prior to each

falling edge of ⎯C⎯S. An internal weak pull-up resistor is active

on the SCK pin during the falling edge of ⎯C⎯S; therefore,

the internal SCK mode is automatically selected if SCK is

not externally driven.

The serial data output pin (SDO) is Hi-Z as long as ⎯C⎯S is

HIGH. At any time during the conversion cycle, ⎯C⎯S may be

pulled low in order to monitor the state of the converter.

Once ⎯C⎯S is pulled LOW, SCK goes LOW and ⎯E⎯O⎯C is output

to the SDO pin. ⎯E⎯O⎯C =1 while the conversion is in progress

and ⎯E⎯O⎯C = 0 if the device is in the sleep state

When testing ⎯E⎯O⎯C, if the conversion is complete (⎯E⎯O⎯C =

0), the device will exit sleep state. In order to return to the

sleep state and reduce the power consumption, ⎯C⎯S must

be pulled HIGH before the device pulls SCK HIGH. When

the device is using its own internal oscillator (FO is tied

LOW), the ﬁrst rising edge of SCK occurs 12μs (tEOCTEST

= 12μs) after the falling edge of ⎯C⎯S. If FO is driven by an

external oscillator of frequency fEOSC, then tEOCTEST =

3.6/fEOSC.

If ⎯C⎯S remains LOW longer than tEOCTEST, the ﬁrst rising

edge of SCK will occur and the conversion result is shifted

out the SDO pin on the falling edge of SCK. The serial

input word (SDI) is shifted into the device on the rising

edge of SCK.

After the 24th rising edge of SCK a new conversion au-

tomatically begins. SDO goes HIGH (⎯E⎯O⎯C = 1) and SCK

remains HIGH for the duration of the conversion cycle.

Once the conversion is complete, the cycle repeats.

μF

0.1

μF

2.7V TO 5.5V

Hi-Z

2496 F07

SCK

(INTERNAL)

SDI

SDO

CONVERSION

SLEEP

DATA INPUT/OUTPUT

CONVERSION

VCC

REF+

REF–

CH0

CH7

CH8

CH15

COM

SCK

SDI

SDO

GND

1,3,4,5,6,31,32,33,39

REFERENCE

VOLTAGE

0.1V TO VCC

ANALOG

INPUTS

= EXTERNAL OSCILLATOR

= INTERNAL OSCILLATOR

LTC2496

4-WIRE

SPI INTERFACE

•

EOC

SGL

ODD

DON'T CARE

MSB

SIG

“0”

OPTIONAL

10k

VCC

<tEOCTEST

LSB

BIT 23

BIT 22 BIT 21 BIT 20 BIT 19 BIT 18 BIT 17 BIT 16 BIT 15

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

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