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LTC3100 Datasheet(PDF) 21 Page - Linear Technology |
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LTC3100 Datasheet(HTML) 21 Page - Linear Technology |
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21 / 24 page ![]() LTC3100 21 3100fa APPLICATIONS INFORMATION LDO Output Capacitor Selection The LDO is designed to be stable with a minimum 1μF output capacitor. No series resistor is required when using low ESR capacitors. For most applications, a 2.2μF ceramic capacitor is recommended. Larger values will improve transient response, and raise the power supply rejection ratio (PSRR) of the LDO. Refer to the Typical Performance Characteristics for the allowable range of output capacitor to ensure loop stability. LDO Output Voltage Programming The output voltage is set by a resistive divider according to the following formula: VV R R OUT =+ ⎛ ⎝⎜ ⎞ ⎠⎟ 0 600 1 4 3 .• The external divider is connected to the output as shown in the Block Diagram. For improved transient response, a feedforward capacitor may be placed in parallel with resistor R4. TYPICAL APPLICATIONS Single-Cell Boost and Buck with Voltage Sequencing Output Voltages During Soft-Start for Sequenced Converter SWBST VINBK VBST LTC3100 FBBST L1 3.3μH 3.5V R2 1M R1 523k C1 10μF 2 CIN 2.2μF VLDO VINBST FBLDO SWBK PGBK PGBST R4 115k R3 25.5k VBATT 0.9V TO 1.5V C2 2.2μF FBBK 12 3 11 4 16 15 9 R6 1M R5 1M C3 10μF MODE RUNBST RUNLDO RUNBK GND 16 13 14 10 8 15 2 7 FF EN_BURST OFF ON L2 3.3μH +3.3V AT 50mA V_I/O 120mA AT VBATT = 0.9V 220mA AT VBATT = 1.2V V_CORE = 1.2V BOOST_GOOD BUCK_GOOD R7 1M R8 1M + 3100 TA02b 1ms/DIV VCORE, 1V/DIV VBST, 1V/DIV VI/O, 1V/DIV |
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