LTC3547B datasheet(11/16 Pages) LINER

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LTC3547B

3547bfb

APPLICATIO S I FOR ATIO

Efﬁciency Considerations

The percent efﬁciency of a switching regulator is equal to

the output power divided by the input power times 100%.

It is often useful to analyze individual losses to determine

what is limiting the efﬁciency and which change would

produce the most improvement. Percent efﬁciency can

be expressed as:

%Efﬁciency = 100% – (L1 + L2 + L3 + ...)

where L1, L2, etc., are the individual losses as a percent-

age of input power.

Although all dissipative elements in the circuit produce

losses, four sources usually account for the losses in

LTC3547B circuits: 1) VIN quiescent current, 2) switching

losses, 3) I2R losses, 4) other system losses.

1) The VIN current is the DC supply current given in the

Electrical Characteristics which excludes MOSFET

driver and control currents. VIN current results in a

small (<0.1%) loss that increases with VIN, even at

no load.

2) The switching current is the sum of the MOSFET driver

and control currents. The MOSFET driver current re-

sults from switching the gate capacitance of the power

MOSFETs. Each time a MOSFET gate is switched from

low to high to low again, a packet of charge dQ moves

from VIN to ground. The resulting dQ/dt is a current out

of VIN that is typically much larger than the DC bias cur-

rent. In continuous mode, IGATECHG = fO(QT + QB), where

QT and QB are the gate charges of the internal top and

bottom MOSFET switches. The gate charge losses are

proportional to VIN and thus their effects will be more

pronounced at higher supply voltages.

3) I2R losses are calculated from the DC resistances

of the internal switches, RSW, and external inductor,

RL. In continuous mode, the average output current

ﬂows through inductor L, but is “chopped” between

the internal top and bottom switches. Thus, the series

resistance looking into the SW pin is a function of both

top and bottom MOSFET RDS(ON) and the duty cycle

(DC) as follows:

RSW = (RDS(ON)TOP) • (DC) + (RDS(ON)BOT) • (1– DC)

(5)

The RDS(ON) for both the top and bottom MOSFETs can

be obtained from the Typical Performance Character-

istics curves. Thus, to obtain I2R losses:

I2R losses = IOUT2 • (RSW + RL)

4) Other “hidden” losses, such as copper trace and in-

ternal battery resistances, can account for additional

efﬁciency degradations in portable systems. It is very

important to include these “system” level losses in

the design of a system. The internal battery and fuse

resistance losses can be minimized by making sure that

CIN has adequate charge storage and very low ESR at

the switching frequency. Other losses, including diode

conduction losses during dead-time, and inductor

core losses, generally account for less than 2% total

additional loss.

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