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GL848 Datasheet(PDF) 49 Page - GENESYS LOGIC

Part # GL848
Description  High Speed USB 2.0
PDF  85 Pages
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Manufacturer  GENESYS [GENESYS LOGIC]
Direct Link  http://www.genesyslogic.com
Logo GENESYS - GENESYS LOGIC

GL848 Datasheet(HTML) 49 Page - GENESYS LOGIC

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GL848 High Speed USB2.0 2-in-1 Scanner Controller With Fast ADF
©2000-2007 Genesys Logic Inc. - All rights reserved.
Page 49
GPIO8
GPIO7
GPIO6
GPIO5
GPIO4
GPIO3
GPIO2
GPIO1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
7-0 GPIO [8:1]
GPIO8~1 input/output ports
Offset 6Eh ……..……..………………..………..….………..….………..…..…. Default value = 8’h00
GPOE16
GPOE15
GPOE14
GPOE13
GPOE12
GPOE11
GPOE10
GPOE9
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
7-0 GPOE [16:9]
Select directions of GPIO16~9 ports. They can be set to different values
independently.
0
Set as input port.
1
Set as output port.
Offset 6Fh ……..……..………………..………..….………..….………..…..…. Default value = 8’h00
GPOE8
GPOE7
GPOE6
GPOE5
GPOE4
GPOE3
GPOE2
GPOE1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
7-0 GPOE [8:1]
Select directions of GPIO8~1 ports. They can be set to different values
independently.
0
Set as input port.
1
Set as output port.
Offset 70h ……..………………………..………..….………..….………..…..…. Default value = 8’h06
X
X
X
RSH4
RSH3
RSH2
RSH1
RSH0
X
X
X
R/W
R/W
R/W
R/W
R/W
7-5 RESERVED
-
4-0 RSH [4:0]
Rising edge position of CCD RS.
Offset 71h ……..………………………..………..….………..….………..…..…. Default value = 8’h08
X
X
X
RSL4
RSL3
RSL2
RSL1
RSL0
X
X
X
R/W
R/W
R/W
R/W
R/W
7-5 RESERVED
-
4-0 RSL [4:0]
Falling edge position of CCD RS.
(1) Color, gray or line-art: 12 clocks(phase)/pixel
0
1
2
3
4
5
6
7
8
9
10
11
0
1
2
3
4
5
6
7
8
9
10
11
CCD RS : RSH=08H
RSL=0BH
Note: 16 clocks(phase)/pixel and 18 clocks(phase)/pixel modes are similar to 12 clocks(phase)/pixel mode.
Offset 72h ……..………………………..………..….………..….………..…..…. Default value = 8’h08
X
X
X
CPH4
CPH3
CPH2
CPH1
CPH0



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