LTC3850 datasheet(21/36 Pages) LINER

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LTC3850/LTC3850-1

38501fb

turns on the topside switch. The switch node voltage, SW,

rises to VIN and the BOOST pin follows. With the topside

MOSFET on, the boost voltage is above the input supply:

VBOOST = VIN + VINTVCC. The value of the boost capacitor

CB needs to be 100 times that of the total input capa-

citance of the topside MOSFET(s). The reverse break-

down of the external Schottky diode must be greater

than VIN(MAX). When adjusting the gate drive level, the

ﬁnal arbiter is the total input current for the regulator. If

a change is made and the input current decreases, then

the efﬁciency has improved. If there is no change in input

current, then there is no change in efﬁciency.

Undervoltage Lockout

The LTC3850 has two functions that help protect the

controller in case of undervoltage conditions. A precision

UVLO comparator constantly monitors the INTVCC voltage

to ensure that an adequate gate-drive voltage is present.

It locks out the switching action when INTVCC is below

3V. To prevent oscillation when there is a disturbance on

the INTVCC, the UVLO comparator has 500mV of preci-

sion hysteresis.

Another way to detect an undervoltage condition is to

monitor the VIN supply. Because the RUN pins have a

precision turn-on reference of 1.2V, one can use a resistor

divider to VIN to turn on the IC when VIN is high enough.

An extra 4.5μA of current ﬂows out of the RUN pin once

the RUN pin voltage passes 1.2V. One can program the

hysteresis of the run comparator by adjusting the values

of the resistive divider. For accurate VIN undervoltage

detection, VIN needs to be higher than 4V.

CIN and COUT Selection

The selection of CIN is simpliﬁed by the 2-phase architec-

ture and its impact on the worst-case RMS current drawn

through the input network (battery/fuse/capacitor). It can

be shown that the worst-case capacitor RMS current occurs

when only one controller is operating. The controller with

the highest (VOUT)(IOUT) product needs to be used in the

formula below to determine the maximum RMS capacitor

current requirement. Increasing the output current drawn

from the other controller will actually decrease the input

RMS ripple current from its maximum value. The out-of-

phase technique typically reduces the input capacitor’s RMS

ripple current by a factor of 30% to 70% when compared

to a single phase power supply solution.

In continuous mode, the source current of the top MOSFET

is a square wave of duty cycle (VOUT)/(VIN). To prevent

large voltage transients, a low ESR capacitor sized for the

maximum RMS current of one channel must be used. The

maximum RMS capacitor current is given by:

CIN Required IRMS

IMAX

VIN

VOUT

() V

IN –VOUT

() 1/2

This formula has a maximum at VIN = 2VOUT, where IRMS

= IOUT/2. This simple worst-case condition is commonly

used for design because even signiﬁcant deviations do not

offer much relief. Note that capacitor manufacturers’ ripple

current ratings are often based on only 2000 hours of life.

This makes it advisable to further derate the capacitor, or

to choose a capacitor rated at a higher temperature than

required. Several capacitors may be paralleled to meet

size or height requirements in the design. Due to the high

operating frequency of the LTC3850, ceramic capacitors

can also be used for CIN. Always consult the manufacturer

if there is any question.

The beneﬁt of the LTC3850 2-phase operation can be cal-

culated by using the equation above for the higher power

controller and then calculating the loss that would have

resulted if both controller channels switched on at the same

time. The total RMS power lost is lower when both control-

lers are operating due to the reduced overlap of current

pulses required through the input capacitor’s ESR. This is

why the input capacitor’s requirement calculated above for

the worst-case controller is adequate for the dual controller

design. Also, the input protection fuse resistance, battery

resistance, and PC board trace resistance losses are also

reduced due to the reduced peak currents in a 2-phase

system. The overall beneﬁt of a multiphase design will

only be fully realized when the source impedance of the

power supply/battery is included in the efﬁciency testing.

The sources of the top MOSFETs should be placed within

1cm of each other and share a common CIN(s). Separating

the sources and CIN may produce undesirable voltage and

current resonances at VIN.

A small (0.1μF to 1μF) bypass capacitor between the chip

VIN pin and ground, placed close to the LTC3850, is also

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