M68HC08 datasheet(21/188 Pages) FREESCALE

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MC68HC908RF2 — Rev. 4.0

Data Sheet

MOTOROLA

Memory

Data Sheet — MC68HC908RF2

Section 2. Memory

2.1 Introduction

The memory map, shown in Figure 2-1, includes:

•

2031 bytes of user FLASH memory

•

128 bytes of random-access memory (RAM)

•

14 bytes of user-defined vectors in FLASH memory

•

768 bytes of monitor read-only memory (ROM)

These definitions apply to the memory map representation of reserved and

unimplemented locations:

•

Reserved — Accessing a reserved location can have unpredictable effects

on MCU operation.

•

Unimplemented — Accessing an unimplemented location causes an illegal

address reset.

2.2 Input/Output Section

Addresses $0000–$003F, shown in Figure 2-2, contain most of the control, status,

and data registers. Additional I/O registers have these addresses:

•

$FE00 — SIM break status register, SBSR

•

$FE01 — SIM reset status register, SRSR

•

$FE02 — SIM break flag control register, BFCR

•

$FE08 — FLASH control register, FLCR

•

$FE0C — BREAK address register high, BRKH

•

$FE0D — BREAK address register low, BRKL

•

$FE0E — BREAK status and control register, BSCR

•

$FE0F — LVI status register, LVISR

•

$FFF0 — FLASH block protection register, FLBPR

•

$FFFF — COP control register, COPCTL

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