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IMP5112CDP Datasheet(PDF) 1 Page - A1 PROs co., Ltd. |
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IMP5112CDP Datasheet(HTML) 1 Page - A1 PROs co., Ltd. |
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1 / 6 page ![]() Key Features x Ultra-Fast response for Fast-20 SCSI applications x 35MHz channel bandwidth x 3.3V operation x Less than 3pF output capacitance x Sleep-mode current less than 275µA x Thermally self limiting x No external compensation capacitors x Implements 8-bit or 16-bit (wide) applications x Compatible with active negation drivers (60mA/channel) x Compatible with passive and active terminations x Approved for use with SCSI 1, 2, 3 and UltraSCSI x Hot swap compatible x Pin-for-pin compatible with LX5211 and UC5606 (IMP5111) x Pin-for-pin compatible with LX5212 and UC5603/5613/5614 (IMP5112) Block Diagrams – + Current Biasing Circuit Thermal Limiting Circuit 24mA Current Limiting Circuit Term Power DATA OUTPUT PIN DB (0) 1 of 9 Channels DISCONNECT (IMP5111) DISCONNECT (IMP5112) 1.4V 2.85V 5111/5112_01.eps 9-Line SCSI T 9-Line SCSI Ter erminat minator or – 35MHz Channel Bandwidt – 35MHz Channel Bandwidth h The 9-channel IMP5111/5112 SCSI terminator is part of IMP's family of high-performance SCSI terminators that deliver true UltraSCSI per- formance. The BiCMOS design offers superior performance over first generation linear regulator/resistor based terminators. IMP's new architecture employs high-speed adaptive elements for each channel, thereby providing the fastest response possible - typically 35MHz, which is 100 times faster than the older linear regulator termi- nator approach. The bandwidth of terminators based on the older regulator/resistor terminator architecture is limited to 500kHz since a large output stabilization capacitor is required. The IMP architecture eliminates the external output compensation capacitor and the need for transient output capacitors while maintaining pin compatibility with first generation designs. Reduced component count is inherent with the IMP5111/5112. The IMP5111/5112 architecture tolerates marginal system designs. A key improvement offered by the IMP5111/5112 lies in its ability to insure reliable, error-free communications even in systems which do not adhere to recommended SCSI hardware design guidelines, such as improper cable lengths and impedance. Frequently, this situation is not controlled by the peripheral or host designer. For portable and configurable peripherals, the IMP5111/5112 can be placed in a sleep mode with a disconnect signal. Quiescent current is less than 275 µA when disabled. When disabled, the outputs are in a high impedance state with output capacitance less than 3pF. © 2002 IMP, Inc. 408-432-9100/www.impweb.com 1 IMP5 IMP511111/5 1/5111122 DATA COMMUNICATIONS © 2002 IMP, Inc. 408-432-9100/www.impweb.com 1 IMP5 IMP511111/5 1/5111122 DATA COMMUNICATIONS |
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