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TMS320VC5402 Datasheet(PDF) 46 Page - Texas Instruments |
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TMS320VC5402 Datasheet(HTML) 46 Page - Texas Instruments |
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46 / 68 page ![]() TMS320VC5402 FIXEDPOINT DIGITAL SIGNAL PROCESSOR SPRS079E – OCTOBER 1998 – REVISED AUGUST 2000 46 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 ready timing for externally generated wait states (continued) MSC MSTRB READY D[15:0] A[19:0] CLKOUT tv(MSCH) th(RDY) Wait State Generated by READY Wait States Generated Internally th(RDY)MSTRB tv(RDY)MSTRB tv(MSCL) tsu(RDY) NOTE A: A[19:16] are always driven low during accesses to external data space. Figure 18. Memory Write With Externally Generated Wait States |
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