June 2009

PCS1P2192A

rev 1.0

Notice: The information in this document is subject to change without notice.

PulseCore Semiconductor Corporation

2105 S. Bascom Ave Suite 210, Campbell, CA 95008

• Tel: 408-879-9077 • Fax: 408-879-9018

www.pulsecoresemi.com

VDP Multiple Pixel Clock Generator

Features

•

Generates multiple clock outputs from 20MHz

external reference clock

•

Input frequency: 20MHz

•

Output frequencies:

•

Selectable CLKOUT:

108MHz, 27MHz, 33.2MHz, 85MHz, 65MHz,

25MHz, 45MHz, and 40MHz

•

REFOUT: 20MHz

•

Operating Supply Voltage: 3.3V ± 0.3V

•

Zero ppm frequency synthesis error on all clock

outputs

•

Commercial temperature: 0°C to +85°C

•

8-pin SOIC package

Product Description

The PCS1P2192A is a clock generator that generates

multiple selectable pixel clock outputs for Video Display

Panel applications from an external 20MHz reference

clock. The PLL based clock generator is specifically

designed to provide zero ppm frequency synthesis error

on all clock outputs. Various pixel clock

rates are

selectable through frequency selection pins S[2:0] (Refer

Frequency Selection Table)

The device provides a

reference clock output additionally. Operating Supply

Voltage for this device is 3.3V± 0.3V. The device is

available in an 8 pin SOIC package, in commercial

temperature grade.

Applications

PCS1P2192A is targeted towards Video Display Panel

(VDP) applications like VGA, SVGA, XGA, WXGA,

UXGA.

Block Diagram

GND

CLKIN

PLL

CLKOUT

REFOUT

[S2: S0]