September 2006

PCS5I9775

rev 0.4

2.5V or 3.3V, 200MHz, 14 Output Zero Delay Buffer

2 of 12

Notice: The information in this document is subject to change without notice.

Pin Configuration

VSS

1

2

4

3

5

6

7

8

9

10

11

52 51 50 49 48 47 46 45 44

41 40

14 15 16 17 18 19 20 21 22 23 24

39

38

37

36

35

34

33

32

31

30

29

MR#/OE

CLK_STP#

SELC

PLL_EN

SELA

TCLK_SEL

TCLK0

TCLK1

VCO_SEL1

SELB

FB_IN

QB4

VDDQB

QB3

VSS

QB2

VDDQB

QB1

VSS

VSS

FB_OUT

PCS5I9775

12

13

25 26

27

28

43 42

VDD

AVDD

VDDFB

NC