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THS6214IPWPR Datasheet(PDF) 30 Page - Texas Instruments |
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THS6214IPWPR Datasheet(HTML) 30 Page - Texas Instruments |
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30 / 41 page ![]() BOARD LAYOUT GUIDELINES THS6214 SBOS431 – MAY 2009 ....................................................................................................................................................................................................... www.ti.com peaked frequency response. The 1.24k Ω feedback resistor used in the Typical Characteristics at a gain Achieving optimum performance with a of +10V/V on ±12V supplies is a good starting point high-frequency amplifier such as the THS6214 for design. Note that a 1.5k Ω feedback resistor, requires careful attention to board layout parasitic and rather than a direct short, is recommended for a external component types. Recommendations that unity-gain follower application. A current-feedback op optimize performance include: amp requires a feedback resistor to control stability even in the unity-gain follower configuration. a) Minimize parasitic capacitance to any ac ground for all of the signal I/O pins. Parasitic capacitance on d) Connections to other wideband devices on the the output and inverting input pins can cause board may be made with short direct traces or instability; on the noninverting input, it can react with through onboard transmission lines. For short the source impedance to cause unintentional band connections, consider the trace and the input to the limiting. To reduce unwanted capacitance, a window next device as a lumped capacitive load. Relatively around the signal I/O pins should be opened in all of wide traces (50mils to 100mils [.050in to .100in, or the ground and power planes around those pins. 1,27mm to 2,54mm]) should be used, preferably with Otherwise, ground and power planes should be ground and power planes opened up around them. unbroken elsewhere on the board. Estimate the total capacitive load and set RS from the plot of Recommended RS vs Capacitive Load (see b) Minimize the distance (less than 0.25in, or Figure 6, Figure 24, Figure 36, Figure 48, Figure 61, 6,35mm) from the power-supply pins to and Figure 73). Low parasitic capacitive loads (less high-frequency 0.1 µF decoupling capacitors. At the than 5pF) may not need an isolation resistor because device pins, the ground and power plane layout the THS6214 is nominally compensated to operate should not be in close proximity to the signal I/O pins. with a 2pF parasitic load. If a long trace is required, Avoid narrow power and ground traces to minimize and the 6dB signal loss intrinsic to a inductance between the pins and the decoupling doubly-terminated transmission line is acceptable, capacitors. The power-supply connections should implement a matched-impedance transmission line always be decoupled with these capacitors. An using microstrip or stripline techniques (consult an optional supply decoupling capacitor across the two ECL design handbook for microstrip and stripline power supplies (for bipolar operation) improves layout techniques). A 50 Ω environment is not second-harmonic distortion performance. Larger necessary on board; in fact, a higher impedance (2.2 µF to 6.8µF) decoupling capacitors, effective at environment improves distortion (see the distortion lower frequencies, should also be used on the main versus load plots). With a characteristic board trace supply pins. These capacitors can be placed impedance defined based on board material and somewhat farther from the device and may be shared trace dimensions, a matching series resistor into the among several devices in the same area of the PCB. trace from the output of the THS6214 is used, as well c) Careful selection and placement of external as a terminating shunt resistor at the input of the components preserve the high-frequency destination device. Remember also that the performance of the THS6214. Resistors should be a terminating impedance is the parallel combination of very low reactance type. Surface-mount resistors the shunt resistor and the input impedance of the work best and allow a tighter overall layout. Metal film destination device. and carbon composition, axially-leaded resistors can This total effective impedance should be set to match also provide good high-frequency performance. the trace impedance. The high output voltage and Again, keep leads and PCB trace length as short as current capability of the THS6214 allows multiple possible. Never use wire-wound type resistors in a destination devices to be handled as separate high-frequency application. Although the output pin transmission lines, each with their own series and and inverting input pin are the most sensitive to shunt terminations. If the 6dB attenuation of a parasitic capacitance, always position the feedback doubly-terminated transmission line is unacceptable, and series output resistor, if any, as close as possible a long trace can be series-terminated at the source to the output pin. Other network components, such as end only. noninverting input termination resistors, should also Treat the trace as a capacitive load in this case and be placed close to the package. Where double-side set the series resistor value as shown in the plot of component mounting is allowed, place the feedback RS vs Capacitive Load. However, this configuration resistor directly under the package on the other side does not preserve signal integrity as well as a of the board between the output and inverting input doubly-terminated line. If the input impedance of the pins. The frequency response is primarily determined destination device is low, there is some signal by the feedback resistor value as described attenuation as a result of the voltage divider formed previously. Increasing the value reduces the by the series output into the terminating impedance. bandwidth, whereas decreasing it leads to a more 30 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): THS6214 |
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