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PCA9685 Datasheet(PDF) 39 Page - NXP Semiconductors

Part # PCA9685
Description  16-channel, 12-bit PWM Fm I2C-bus LED controller
PDF  50 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCA9685 Datasheet(HTML) 39 Page - NXP Semiconductors

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Table 14.
Dynamic characteristics
Symbol
Parameter
Conditions
Standard-mode
I2C-bus
Fast-mode I2C-bus
Fast-mode Plus
I2C-bus
Unit
Min
Max
Min
Max
Min
Max
fSCL
SCL clock frequency
[1]
0
100
0
400
0
1000
kHz
fEXTCLK
frequency on pin EXTCLK
DC
50
DC
50
DC
50
MHz
tBUF
bus free time between a STOP
and START condition
4.7
-
1.3
-
0.5
-
µs
tHD;STA
hold time (repeated) START
condition
4.0
-
0.6
-
0.26
-
µs
tSU;STA
set-up time for a repeated
START condition
4.7
-
0.6
-
0.26
-
µs
tSU;STO
set-up time for STOP condition
4.0
-
0.6
-
0.26
-
µs
tHD;DAT
data hold time
0
-
0
-
0
-
ns
tVD;ACK
data valid acknowledge time
[2]
0.3
3.45
0.1
0.9
0.05
0.45
µs
tVD;DAT
data valid time
[3]
0.3
3.45
0.1
0.9
0.05
0.45
µs
tSU;DAT
data set-up time
250
-
100
-
50
-
ns
tLOW
LOW period of the SCL clock
4.7
-
1.3
-
0.5
-
µs
tHIGH
HIGH period of the SCL clock
4.0
-
0.6
-
0.26
-
µs
tf
fall time of both SDA and SCL
signals
[4][5]
-
300
20 + 0.1Cb[6]
300
-
120
ns
tr
rise time of both SDA and SCL
signals
-
1000
20 + 0.1Cb[6]
300
-
120
ns
tSP
pulse width of spikes that must
be suppressed by the input filter
[7]
-
50
-
50
-
50
ns
tPLZ
LOW to OFF-state propagation
delay
OE to LEDn;
OUTNE[1:0] = 10 or 11
in MODE2 register
-
40
-
40
-
40
ns
tPZL
OFF-state to LOW propagation
delay
OE to LEDn;
OUTNE[1:0] = 10 or 11
in MODE2 register
-
60
-
60
-
60
ns
tPHZ
HIGH to OFF-state propagation
delay
OE to LEDn;
OUTNE[1:0] = 10 or 11
in MODE2 register
-
60
-
60
-
60
ns



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