CS470XX datasheet(21/40 Pages) CIRRUS

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CS470xx Data Sheet

Audio SOC Processor Family

DS787PP1

5.10 Digital Switching Characteristics — Serial Control Port - SPI Master Mode

Figure 8. Serial Control Port - SPI Master Mode Timing

Parameter

Symbol

Min

Typical

Max

Units

SCP_CLK frequency1,2

1. fspisck indicates the maximum speed of the hardware. The system designer should be aware that the actual

maximum speed of the communication port may be limited by the firmware application.

2. See Section 5.7.

fspisck

-Fxtal/2

MHz

EE_CS falling to SCP_CLK rising 3

3. SCP_CLK PERIOD refers to the period of SCP_CLK as being used in a given application. It does not refer to a

tested parameter

tspicss

11*DCLKP +

(SCP_CLK PERIOD)/2

-ns

SCP_CLK low time

tspickl

SCP_CLK high time

tspickh

Setup time SCP_MISO input

tspidsu

Hold time SCP_MISO input

tspidh

SCP_CLK low to SCP_MOSI output valid

tspidov

-8

SCP_CLK low to EE_CS falling

tspicsl

SCP_CLK low to EE_CS rising

tspicsh

11*DCLKP +

(SCP_CLK PERIOD)/2

-ns

Bus free time between active EE_CS

tspicsx

3*DCLKP

SCP_CLK falling to SCP_MOSI output high-Z

tspidz

-20

EE_CS

SCP_CLK

SCP_MISO

SCP_MOSI

12670

tspicss

tspickl

tspickh

tspidsu

tspidh

tspidov

R/W

MSB

LSB

MSB

LSB

tspicsh

tspicsx

fspisck

tspidz

tspicsl

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