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AS4LC4M16DG-5S/XT Datasheet(PDF) 10 Page - Austin Semiconductor |
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AS4LC4M16DG-5S/XT Datasheet(HTML) 10 Page - Austin Semiconductor |
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10 / 25 page  DRAM DRAM DRAM DRAM DRAM AS4LC4M16 AustinSemiconductor,Inc.reservestherighttochangeproductsorspecificationswithoutnotice. 10 AS4LC4M16 Rev. 1.1 6/05 Austin Semiconductor, Inc. AC ELECTRICAL CHARACTERISTICS (Continued)5,6,7,8,9,10,11,12 (V CC = +3.3V ±0.3V) SYMBOL MIN MAX MIN MAX UNITS NOTES EDO-PAGE-MODE READ or WRITE cycle time tPC 20 25 ns 34 EDO-PAGE-MODE READ-WRITE cycle time tPRWC 47 56 ns 34 Access time from RAS\ tRAC 50 60 ns RAS\ to column-address delay time tRAD 912 ns 15 Row address hold time tRAH 710 ns RAS\ pulse width tRAS 50 10,000 60 10,000 ns RAS\ pulse width (EDO PAGE MODE) tRASP 50 125,000* 60 125,000* ns RAS\ pulse width during Self Refresh tRASS 80 80 µs Random READ or WRITE cycle time tRC 84 104 ns RAS\ to CAS\ delay time tRCD 11 14 ns 14, 28 READ command hold time (referenced to CAS\) tRCH 0 0 ns 16, 30 READ command setup time tRCS 00 ns 28 Refresh period tREF 64/24** 64/24** ms 22, 23 Refresh period ("S" version) tREF 100 100 ms 23, 38 RAS\ precharge time tRP 30 40 ns RAS\ to CAS\ precharge time tRPC 55 ns RAS\ precharge time exiting Self Refresh tRPS 90 105 ns READ command hold time (referenced to RAS\) tRRH 00 ns 16 RAS\ hold time tRSH 13 15 ns 35 READ-WRITE cycle time tRWC 116 140 ns RAS\ to WE\ delay time tRWD 67 79 ns 18 WRITE command to RAS\ lead time tRWL 13 15 ns Transitioin time (rise or fall) tT 225 2 25 ns WRITE command hold time tWCH 810 ns 35 WRITE command hold time (referenced to RAS\) tWCR 38 45 ns WE\ command setup time tWCS 0 0 ns 18, 28 WE\ to outputs in High-Z tWHZ 12 15 ns WRITE command pulse width tWP 55 ns WE\ pulse widths to disable outputs tWPZ 10 10 ns WE\ hold time (CBR Refresh) tWRH 810 ns WE\ setup time (CBR Refresh) tWRP 810 ns DESCRIPTION -6 -5 NOTES: *For XT Temp (-55°C to +125°C) tRASP (MAX) = 80,000ns for -5 and -6 speed. **64ms Refresh for IT Temp, 24ms Refresh for XT Temp. |
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