SRAM

SRAM

SRAM

SRAM

SRAM

AS8SLC128K32

AustinSemiconductor,Inc.reservestherighttochangeproductsorspecificationswithoutnotice.

1

AS8SLC128K32

Rev. 0.6 06/05

Austin Semiconductor, Inc.

GENERAL DESCRIPTION

The Austin Semiconductor, Inc. AS8SLC128K32 is a high speed,

4MB CMOS SRAM multichip module (MCM) designed for full

temperature range, 3.3V power supply, military, space, or high

reliability mass memory and fast cache applications.

The device input and output TTL compatible. Writing is

executed when the write enable (WE\) and chip enable (CS\) inputs are

low. Reading is accomplished when WE\ is high and CS\ and output

enable (OE\) are both low. Access time grades of 10ns, 12ns, 15ns,

17ns, 20ns and 25ns maximum are standard.

The products are designed for operation over the temperature

range of -55°C to +125°C and screened under the full military

environment.

FEATURES

OPTIONS

MARKINGS

• Operating Temperature Ranges

XT

IT

• Timing

10ns (Contact Factory)

-10

12ns

-12

15ns

-15

17ns

-17

20ns

-20

25ns

-25

• Package

Ceramic Quad Flatpack

Q

Pin Grid Array

P

• Low Power Data Retention Mode

L

PIN ASSIGNMENT

(Top View)

AVAILABLE AS MILITARY

SPECIFICATIONS

• MIL-STD-883

68 Lead CQFP (Q)

128K x 32 SRAM

SRAM MEMORY ARRAY

For more products and information

please visit our web site at

www.austinsemiconductor.com

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

I/O 0

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

GND

I/O 8

I/O 9

I/O 10

I/O 11

I/O 12

I/O 13

I/O 14

I/O 15

I/O 16

I/O 17

I/O 18

I/O 19

I/O 20

I/O 21

I/O 22

I/O 23

GND

I/O 24

I/O 25

I/O 26

I/O 27

I/O 28

I/O 29

I/O 30

I/O 31

60

59

58

57

56

55

54

53

52

51

50

49

48

47

46

45

44

CS

CS

CS

CS

\

NC

NC

CS2\

CS1\

CS4\

CS3\

\

\

\

\

FUNCTIONAL BLOCK DIAGRAM

66 Lead PGA (P)