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SC65D02P40 Datasheet(PDF) 7 Page - Silan Microelectronics Joint-stock |
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SC65D02P40 Datasheet(HTML) 7 Page - Silan Microelectronics Joint-stock |
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7 / 16 page ![]() SC65D02P40 [Function description] When external reset occurs, the initial value of timer(WDT_TimerH, WDT_TimerL)and 21-bit watchdog counter are both cleared. When use the clear module to reset the watchdog timer, the high 5-bit of the watchdog counter is cleared, the low 16-bit will be loaded from the initial value register of timer again and begin to count. When the low 16-bit of watchdog counter counts to FFFFH, the timer will overflow if increasing by 1 , then reload the initial value of timer; At this time, if the interrupt mask bit (WDT_MASK)=“0” and the timer interrupt enable bit(WDT_TimerEn)=“1”, it will generate timer interrupt signal, and WDT_FLAG is set. Add 1 to the counting value of high 5-bit of watchdog timer when bit15 of watchdog counter changes from 1 to 0; the watchdog will generate reset signal if bit20 of watchdog counter changes from 1 to 0. 3.2 I/O ports [Description] SC65D02P40 includes three groups of I/O ports: P0, P1 and P2. P0 and P2 are 8-bit parallel ports, while P1 is 4-bit parallel port. Each I/O port of SC65D02P40 can be set independently as weak pull-up input or push-pull output status. The high level output capacity of the port is much bigger than low level output capacity, so it can identify the dual- key or multi-key pressing at the same time. [Structure] Figure 4 – P0 structure Note: The structure of P1 and P2 is the same as P0. [Function description] As shown in figure 4, we take P0 for example to introduce the I/O port function. The function of P1 and P2 is the same with that of P0. When P0_Ctrl[n] is set, PMOS P1 and NMOS N1 are both off, PMOS P2 is on, pull-up resistor Rpu is active, and port P0n is input mode. When P0_Ctrl[n] is cleared, PMOS P2 is off, port P0n is output mode. At this time, when P0_Data[0] is set, PMOS P1 is on, NMOS N1 is off, and port P0n outputs high level; when P0_Data[0] is cleared, PMOS P1 is off, NMOS N1 is on, and port P0n outputs low level. HANGZHOU SILAN MICROELECTRONICS CO.,LTD REV:1.2 2008.07.21 Http: //www.silan.com.cn Page 7 of 17 |
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