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STM32W108CB Datasheet(PDF) 78 Page - STMicroelectronics |
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STM32W108CB Datasheet(HTML) 78 Page - STMicroelectronics |
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78 / 179 page  Serial interfaces STM32W108CB, STM32W108HB 78/179 Doc ID 16252 Rev 2 7.7.12 Receive DMA count register A (SCx_RXCNTA) Address offset: 0xC820 (SC1_RXCNTA) and 0xC020 (SC2_RXCNTA) Reset value: 0x0000 0000 7.7.13 Receive DMA count register B (SCx_RXCNTB) Address offset: 0xC824 (SC1_RXCNTB) and 0xC024 (SC2_RXCNTB) Reset value: 0x0000 0000 7.7.14 Saved receive DMA count register (SCx_RXCNTSAVED) Address offset: 0xC870 (SC1_RXCNTSAVED) and 0xC070 (SC2_RXCNTSAVED) Reset value: 0x0000 0000 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 SC_RXCNTA rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw [12:0] SC_RXCNTA: The offset from the start of DMA receive buffer A at which the next byte will be written. This register is set to zero when the buffer is loaded and when the DMA is reset. If this register is written when the buffer is not loaded, the buffer is loaded. 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 SC_RXCNTB rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw [12:0] SC_RXCNTB: The offset from the start of DMA receive buffer B at which the next byte will be written. This register is set to zero when the buffer is loaded and when the DMA is reset. If this register is written when the buffer is not loaded, the buffer is loaded. 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 SC_RXCNTSAVED rw rw rw r r r r r rr rr rr r r |
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