Electronic Components Datasheet Search
  New Zealand  ▼
ALLDATASHEET.CO.NZ

X  

Preview PDF HTML

STM32F101T6U6ATR Datasheet(PDF) 60 Page - STMicroelectronics

Part # STM32F101T6U6ATR
Description  Low-density access line, ARM-based 32-bit MCU with 16 or 32 KB Flash, 5 timers, ADC and 4 communication interfaces
PDF  73 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F101T6U6ATR Datasheet(HTML) 60 Page - STMicroelectronics

Back Button STM32F101T6U6ATR Datasheet HTML 56Page - STMicroelectronics STM32F101T6U6ATR Datasheet HTML 57Page - STMicroelectronics STM32F101T6U6ATR Datasheet HTML 58Page - STMicroelectronics STM32F101T6U6ATR Datasheet HTML 59Page - STMicroelectronics STM32F101T6U6ATR Datasheet HTML 60Page - STMicroelectronics STM32F101T6U6ATR Datasheet HTML 61Page - STMicroelectronics STM32F101T6U6ATR Datasheet HTML 62Page - STMicroelectronics STM32F101T6U6ATR Datasheet HTML 63Page - STMicroelectronics STM32F101T6U6ATR Datasheet HTML 64Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 60 / 73 page
background image
Electrical characteristics
STM32F101x4, STM32F101x6
60/74
Doc ID 15058 Rev 3
5.3.16
12-bit ADC characteristics
Unless otherwise specified, the parameters given in Table 41 are derived from tests
performed under the ambient temperature, fPCLK2 frequency and VDDA supply voltage
conditions summarized in Table 8.
Note:
It is recommended to perform a calibration after each power-up.
Table 41.
ADC characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VDDA
Power supply
2.4
3.6
V
fADC
ADC clock frequency
0.6
14
MHz
fS
(1)
Sampling rate
0.05
1
MHz
fTRIG
(1)
External trigger frequency
fADC = 14 MHz
823
kHz
17
1/fADC
VAIN
Conversion voltage range(2)
0 (VSSA or VREF-
tied to ground)
VREF+
V
RAIN
(1)
External input impedance
See Equation 1 and
Table 42 for details
50
k
RADC
(1)
Sampling switch resistance
1
k
CADC
(1)
Internal sample and hold
capacitor
8pF
tCAL
(1)
Calibration time
fADC = 14 MHz
5.9
µs
83
1/fADC
tlat
(1)
Injection trigger conversion
latency
fADC = MHz
0.214
µs
3(3)
1/fADC
tlatr
(1)
Regular trigger conversion
latency
fADC = 14 MHz
0.143
µs
2(3)
1/fADC
tS
(1)
Sampling time
fADC = 14 MHz
0.107
17.1
µs
1.5
239.5
1/fADC
tSTAB
(1)
Power-up time
0
0
1
µs
tCONV
(1)
Total conversion time
(including sampling time)
fADC = 14 MHz
1
18
µs
14 to 252 (tS for sampling +12.5 for
successive approximation)
1/fADC
1.
Guaranteed by design, not tested in production.
2.
VREF+ is internally connected to VDDA and VREF- is be internally connected to VSSA.
3.
For external triggers, a delay of 1/fPCLK2 must be added to the latency specified in Table 41.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com